Accelerating seismic computations using customized number representations on FPGAs

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# Customized Number Representations

FPGA-based implementations have the advantage over current software-based implementations of being able to use customizable number representations in their circuit designs. On a software platform, users are usually constrained to a few fixed number representations, such as 32/64-bit integers and single/double-precision floating-point; while the reconfigurable logic and connections on an FPGA enables the users to explore various number formats with arbitrary bit-widths. Furthemore, users are also able to design the arithmetic operations for these customized number representations, can thereby providing a highly customized solution for a given problem.

cus-rep-wf
Figure 1.
Basic steps to achieve a hardware design with customized number representations.

In general, to provide a customized number representation for an application, we have three questions to solve:

• Which number representation should we use?

There are existing FPGA applications using fixed-point, floating-point and logarithmic numbers. Fixed-point has simple arithmetic implementations, while floating-point and logarithmic number systems (LNS) provide a wide representation range.

• How do you determine the bit-width of the variables in the design?

This problem is generally referred to as bit-width or word-length optimization (Constantinides et al., 2001; Lee et al., 2006). We can further divide this into two different parts: range analysis considers the problem of ensuring that a given variable inside a design has a sufficient number of bits to represent the range of the numbers; while in precision analysis, the objective is to find the minimum number of precision bits for the variables in the design such that the output precision requirements of the design are met.

• How do you implement the arithmetic operations for the customized number representations?

The arithmetic operations of each number system are quite different. For instance, in LNS, multiplication, division and exponential operations become as simple as addition or shift operations, while addition and subtraction become non-linear functions to approximate. The arithmetic operations of regular data formats, such as fixed-point and floating-point, also have different algorithms with different design characteristics. Evaluation of elementary functions also plays a large part in seismic applications (trigonometric and exponential functions). Different evaluation methods and configurations can be used to produce evaluation units with different accuracies and performance.

This section discusses our approaches to finding a solution to these three problems. The approaches are partly based on our previous work on bit-width optimization (Lee et al., 2006) and comparison between different number representations (Fu et al., 2006,2007). As shown in Fig. 1, we manually partition the Fortran program into two parts: one part will run in software and the other in hardware (target code). The first step is to profile the target code to acquire information about the distribution of values that each variable can take. In the second step, based on the range information, we map the Fortran code into a hardware design described in ASC format, which includes implementation of arithmetic operations and function evaluation. In the third step, the ASC description is translated into bit-accurate simulation code, and merged into the original Fortran program to provide a value simulator for the original application. Using this value simulator, explorations can be performed with configurable settings such as different number representations, different bit-widths and different arithmetic algorithms. Based on the exploration results, we can determine the optimal number format for this application with regards to certain characteristics such as circuit area and performance.

Subsections
 Accelerating seismic computations using customized number representations on FPGAs

Next: Profiling Up: Fu et al.: FPGA Previous: A stream Compiler (ASC)

2007-09-18