Introduction

Downward continued based migration often provides higher quality migration results. For velocity estimation and lithological determination they reqire a change in strategy compared to Kirchoff based approaches. In Kirchhoff based approaches moveout and amplitude information are evaluated as a function of offset. For downward continuation based methods angle gathers are constructed from subsurface offset gathers (Biondi and Symes, 2004; Prucha et al. , 1999; de Bruin et al. , 1990).

The cost of constructing the subsurface offset gathers is trivial for source-receiver migration methods based on the Double Square Root (DSR) equation (Claerbout, 1985) but can be a dominant cost in shot profile and plane wave methods (Rickett and Sava, 2002). With the increased use of wide azimuth geometries (Michell et al. , 2006) and the resulting 3-D angle gathers, over 90% of CPU cycles can be spent in constructing the subsurface offset gathers.

Hardware accelerators are emerging as a powerful solution to computationally intensive problems. A standard desktop PC or cluster node can be augmented with additional hardware dedicated to providing substantially increased performance for particular applications. Research projects have shown (Cheung et al. , 2005; He et al. , 2004; Sano et al. , 2007; Zhang et al. , 2005) that FPGA-based hardware accelerators can offer order-of-magnitude greater performance than conventional CPUs, provided the algorithm to be accelerated performs a large number of operations per data point.

Construcing subsurface offset gathers involves a significant number of operations for each data point, making it an ideal candidate for acceleration. We implement subsurface offset gather construction on a FPGA. We show that a 20x speed-up is achievable using 32-bit precision. Further we demonstrate that 40x speed-up can be achieved by using a lower precision representation of the data, with minimal image degredation.